CPU platform iteration is accelerated
Intel still dominates the server CPU market, and its product iteration cycle determines the overall upgrade pace of general-purpose servers.
Intel's market share has dropped from 80%+ in 2021 to 70%+ in 2022, according to consulting firm Counterpoint, and AMD continues to gain market share, but Intel remains the leader in the server CPU market in absolute volume.
The upgrade of memory rate requires the support of the CPU platform, and we can see from Intel's past CPU upgrades, the server CPU Cooper Lake released in 2020 supports DDR4 memory rate of 3200MT/s, and from the perspective of DDR4 child planning, this rate means that the replacement of DDR4 children has come to an end in that year.
Intel originally planned to release the first server CPU product with DDR5 memory support, Sapphire Rapids, in 2021, but due to their own reasons, the release was postponed and finally released in January 2023. According to the communication of Intel's legal conference, Sapphire Rapids had a significant increase in 23Q3, which led to the improvement of its ASP. Overall, Sapphire Rapids has been substantially delayed by more than 2 years, which has led to a continuous delay in the generational replacement of server memory from DDR4 to DDR5.
However, since 2023, Intel's server CPU iteration has accelerated, after the release of Sapphire Rapids in early 2023, Emerald Rapids in December 2023, and according to Intel's Roadmap, it is expected to release two server CPUs in 2024: Sierra Forest and Granite Rapids, and the memory rate supported by the new CPUs will be in 2023 The upgrade from 5600MT/s to 6400MT/s has accelerated the iteration rate of DDR5.
In addition, AMD's server CPU iteration is at a normal pace, and its server CPU products that support DDR5-4800 were released at the end of 2022, but the promotion of server DDR5 memory iteration in the first half of the year is not obvious, we believe that there are two main reasons, one is that AMD's market share is not high enough, and the other is because the main upscale node of AMD's CPU platform Genoa also occurred in 23Q3. In addition, AMD will release two CPUs in 2023, Bergamo and Siena, both of which support DDR5 speeds of 4800MT/s, and we expect AMD's next-generation CPUs to support higher memory speeds.
Memory interface iterations are expected to accelerate
According to the JEDEC standard, DDR5 memory modules require three types of supporting chips in addition to memory chips and memory interface chips, namely serial detection hubs (SPDs), temperature sensors (TSs), and power management chips (PMICs). Montage is one of the two companies in the world that can provide a complete set of solutions for DDR5 series memory modules.
Montage Technology's DDR5 memory interface chips and supporting chips
As the server memory rate increases, the corresponding memory interface chips will also be upgraded, which in turn will increase the value. From 2016 to 2020, DDR4 replaced DDR3 as the mainstream memory specification, and the speed of DDR4 is gradually increasing. During this period, we can see that Montage's ASP has remained at a high level and is showing an upward trend.
In 2023, with the gradual increase in the number of DDR5-capable CPUs, the penetration rate of DDR5 memory will increase, driving the shipment of DDR5 memory interface chips to gradually increase. In the context of destocking this year, Montage Technology's revenue from interconnected chips has increased for two consecutive quarters, driven by the increase in the proportion of DDR5 memory interface chip shipments, and the gross profit margin has gradually increased to 66%, an increase of about 12 pct compared with Q1. Moreover, the company's DDR5 second-generation interface chips began to be shipped on a large scale, and the proportion is expected to continue to increase.
With the gradual end of destocking, the overall demand of the industry is expected to return to normal, and the total market volume of memory interface chips will also be restored. Because DDR5 memory modules have 3 more supporting chips than DDR4, the value of the overall chip will increase, so we believe that the market size of server memory interface chips will grow significantly in the DDR5 iteration cycle. Montage, as a company in the industry that can provide a full suite of solutions, is expected to benefit the most from this process.
Montage Connected Chip Shipments and ASP
Montage Interconnect Quarterly Revenue (RMB million)
Montage Technology's interconnection chip gross profit margin
As the DRAM rate on the PC side increases, Montage's CKD chips will usher in a 0-to-1 process. When the DDR5 data rate reaches 6400MT/s and above, a dedicated clock driver chip must be used to slow down and re-drive the clock signal on the memory module to meet the integrity and reliability requirements of the high-speed clock signal. According to Intel's roadmap, Arrow Lake will be released in 2024 and will support memory speeds of up to 6400MT/s, so we expect that when the new CPUs are released, Montage's CKD chips will gradually ramp up and usher in a 0→1 process.
Montage also has a deep presence in PCIe Retimer and CXL.
With the rate upgrade of PCIe, which brings prominent signal attenuation and reference clock timing reshaping problems, in order to compensate for the loss of high-speed signals and improve the quality of the signal, an ultra-high-speed timing integration chip (Retimer) is usually added to the link. Montage's PCIe 5.0 Retimer has been mass-produced in January 2023 and can be applied to typical application scenarios such as AI servers, NVMe SSDs, and Riser cards.
The MXC chip is a CXL memory expansion controller chip, which belongs to the third device type defined by the CXL protocol. The chip provides a high-bandwidth, low-latency, high-speed interconnect solution for CPUs and CXL-based devices, enabling memory sharing between CPUs and CXL devices, dramatically improving system performance while significantly reducing software stack complexity and data center total cost of ownership (TCO). In May 2022, the company announced the world's first CXL memory expansion controller chip (MXC).
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