In the circuit we design, the pins of different chips use different voltages, such as the common 1.8V, 3.3V, 5V, etc., when communicating between the pins of two different voltage chips, we need to make the levels on both sides meet their own needs and be able to communicate normally, this process is level translation.
For the level translation scheme, we need to choose according to the actual application scenario. The main consideration is the speed and direction of the signal.
According to different application scenarios and cost control, four level translation schemes are provided for reference:
(1) A level-shifting circuit using a diode
When the input 5V-IN is high, the diode is reversed and the output is high.
When the input is low at 5V-IN, the diode is forward and the output is low.
Due to the self-generated nature of the diode, there is a reverse cut-off recovery time and an on-voltage drop, and in practice, the output can cause positive and negative voltage spikes due to the reverse recovery of the diode and the internal junction capacitance. Parallel capacitors at the output eliminate voltage spikes.
Due to the increase in capacitance, the output waveform is slowed down and the data rate is reduced. This is due to the need to charge the capacitor at the output. In use, it is necessary to consider the rate of communication data, and adjust the pull-up resistance and filter capacitance values at the output terminal according to the actual diode and output waveform used, so that the output waveform remains intact.
This circuit can be used for high-voltage to low-voltage conversion, and is not suitable for low-voltage to high-voltage conversion.
(2) A level-shifting circuit using a transistor
The above figure shows a circuit using a transistor for level shifting, Q1 is an NPN type transistor, the VIN voltage is the same as the IN voltage, the VOUT voltage is the same as the OUT voltage, and the input and output directions cannot be exchanged.
When the input terminal is low, the triode Q1 is on, the output terminal and the input terminal are on, and the output terminal is pulled down to close to 0V, so that both terminals are low.
When the input terminal is high, the triode Q1 is cut-off, and the output terminal is pulled high by a pull-up resistor (R26 in the figure above), so that both ends are high.
This circuit uses the turn-on and turn-off characteristics of the tertiary transistor to achieve level shifting, and has the same problems as diode level shifting, which has the same voltage spikes and rates as diode level shifting, and can only be converted in one direction.
(3) A bidirectional level-shifting circuit using a MOS tube
The V1 voltage of this circuit scheme ≤ the V2 voltage, and the V1 voltage is greater than the on-voltage of the MOS tube.
When S1A is low, MOS transistor Q3 is on, S1A and S2A are on, and the S2A end is pulled down to 0V, so that both ends are low.
When S1A is high, MOS transistor Q3 is turned off, and the S2A terminal is pulled high by a pull-up resistor (R28 in the figure above), so that both ends are high.
When S2A is low, the parasitic diode inside the MOS transistor is turned on, and S1A is pulled down to a low level, and then the MOS transistor is turned on, S1A and S2A are turned on, and the output is pulled down to 0V, so that both ends are low.
When S2A is high, the MOS transistor Q3 is turned off, and the S1A terminal is pulled high by the pull-up resistor (R29 in the figure above), so that both ends are high.
This type of circuit that uses a MOS transistor for level translation has a high switching rate, and is suitable for scenarios that require high-speed level shifting.
(4) Use a dedicated dual-power level translation chip
For use scenarios that require high-speed signals for level shifting, dual-supply level shifting chips are more suitable. There are many types of level translation chips, such as unidirectional level shifting, bidirectional level shifting with direction control, automatic bidirectional level shifting, and dedicated level shifting.
The level switching chip has two structures, similar to the MOS tube level switching circuit structure and gate circuit drive, which are suitable for open-drain circuit and push-pull circuit respectively, and the gate circuit drive structure has a higher conversion rate. Level translation chips are the most stable and reliable, but also more expensive.
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