TW2835應用，在CVBS 中，如何了解Signal timing和 和Croping

問1：     根據TW2823的資料手冊,,外部輸入經過抗混疊濾波器,彩色解碼,通過兩個H/V Crop & Scaler分别提供給display path和record path,但display path和record path是共用HDELAY、HACTIVE、VDELAY、VACTIVE寄存器的,若display path和record path需要設定不同的HDELAY、HACTIVE、VDELAY、VACTIVE值,如何操作?

答1：

a). 在輸入端，Croping在是針對Channel而言的，不是針對Path而言的,這個每個通道都有自己的寄存器來配置HDELAY、HACTIVE、VDELAY、VACTIVE。

b).而Analog CVBS encoder的Sigal timing是通過ENC_HSDEL，ENC_VSDEL,ENC_VSOFF來控制，其video shift是通過ACTIVE_VDEL，ACTIVE_HDEL來實作調整的。

引申閱讀，在Datasheet的章節Timing Interface and Control中，有描述The TW2835 provides or receives the timing signal through the HSENC, VSENC and FLDENC

pins. To adjust the timing of those pins from video output, the TW2835 has the ENC_HSDEL(1xA6), ENC_VSDEL and ENC_VSOFF (1xA5) registers which control only the related signaltiming regardless of analog and digital video output. Likewise, by controlling the ACTIVE_VDEL(1xA7) and ACTIVE_HDEL (1xA8) registers, only active video period can be shifted on horizontal and vertical direction independently. The shift of active video period produces the cropped video image because the timing signal is not changed even though active period is moved. So this feature is restricted to adjust video location in monitor.