瑞芯微电子3588J处理器CAN控制器使用：1.DTS节点配置公共配置kernel-5.10/arch/arm64/bo

瑞芯微电子3588J处理器CAN控制器使用：

1. DTS 节点配置

公共配置 kernel-5.10/arch/arm64/boot/dts/rockchip/rk3588s.dtsi

can0: can@fea50000 {

compatible = "rockchip,can-2.0";

reg = <0x0 0xfea50000 0x0 0x1000>;

interrupts = <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>;

clocks = <&cru CLK_CAN0>, <&cru PCLK_CAN0>;

clock-names = "baudclk", "apb_pclk";

resets = <&cru SRST_CAN0>, <&cru SRST_P_CAN0>;

reset-names = "can", "can-apb";

pinctrl-names = "default";

pinctrl-0 = <&can0m0_pins>;

tx-fifo-depth = <1>;

rx-fifo-depth = <6>;

status = "disabled";

};

can1: can@fea60000 {

compatible = "rockchip,can-2.0";

reg = <0x0 0xfea60000 0x0 0x1000>;

interrupts = <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>;

clocks = <&cru CLK_CAN1>, <&cru PCLK_CAN1>;

clock-names = "baudclk", "apb_pclk";

resets = <&cru SRST_CAN1>, <&cru SRST_P_CAN1>;

reset-names = "can", "can-apb";

pinctrl-names = "default";

pinctrl-0 = <&can1m0_pins>;

tx-fifo-depth = <1>;

rx-fifo-depth = <6>;

status = "disabled";

};

can2: can@fea70000 {

compatible = "rockchip,can-2.0";

reg = <0x0 0xfea70000 0x0 0x1000>;

interrupts = <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>;

clocks = <&cru CLK_CAN2>, <&cru PCLK_CAN2>;

clock-names = "baudclk", "apb_pclk";

resets = <&cru SRST_CAN2>, <&cru SRST_P_CAN2>;

reset-names = "can", "can-apb";

pinctrl-names = "default";

pinctrl-0 = <&can2m0_pins>;

tx-fifo-depth = <1>;

};

2. 板级配置 arch/arm64/boot/dts/rockchip/rk3588-firefly-itx-3588j.dtsi

/* can1 */

&can1 { status = "okay";assigned-clocks = <&cru CLK_CAN1>;assigned-clock-rates = <200000000>; pinctrl-names = "default" ; pinctrl-0 = <&can1m1_pins>;}