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数字电路设计之VGA的字母显示的verilog实现

module vga_initials_top(
		mclk,
		btn,
		sw,
		hsync,
		vsync,
		red,
		green,
		blue
    );

	input wire 		 mclk;
	input wire       btn;
	input wire [7:0] sw;
	output wire      hsync;
	output wire      vsync;
	output wire [2:0]red;
	output wire [2:0]green;
	output wire [1:0]blue;
	
	
	wire       clk,clk25,vidon;
	wire [9:0] hc,vc;
	wire [0:31]M;
	wire [3:0] rom_addr4;
	
	assign clr = btn;

	clkdiv U1(
		.mclk(mclk),
		.clr(clr),
		.clk25(clk25)
	);
	
	vga_640x480 U2(
		.clk(clk25),
		.clr(clr),
		.hsync(hsync),
		.vsync(vsync),
		.hc(hc),
		.vc(vc),
		.vidon(vidon)
	);
	
	vga_initial U3(
		.vidon(vidon),
		.hc(hc),
		.vc(vc),
		.M(M),
		.sw(sw),
		.rom_addr4(rom_addr4),
		.red(red),
		.green(green),
		.blue(blue)
	);
	
	prom_DMH U4(
		.addr(rom_addr4),
		.M(M)
	);
	
endmodule
           
module clkdiv(
	mclk,
	clr,
	clk25
    );

	input wire mclk;
	input wire clr;
	output wire clk25;
	//output wire clk48;
	
	reg  [24:0] q;
	
	[email protected](posedge mclk or posedge clr) begin
		if(clr)
			q <= 0;
		else 
			q <= q + 1;
	end
	
	assign clk25 = q[1];
	
endmodule
           
module vga_640x480(
	clk,
	clr,
	hsync,
	vsync,
	hc,
	vc,
	vidon
);

	input wire 			clk;
	input wire 			clr;
	output reg  		hsync;
	output reg          vsync;
	output reg   [9:0]  hc;
	output reg   [9:0]  vc;
	output reg          vidon;
	
	parameter hpixels = 10'b11001_00000; //琛屽儚绱犵偣=800
	parameter vlines = 10'b10000_01001;  //琛屾暟=521
	parameter hbp = 10'b001000_10000;//
	parameter hfp = 10'b11000_10000;
	parameter vbp =10'b00000_11111;
	parameter vfp = 10'b01111_11111;
	reg vsensable;  //enable for the vertical counter
	
	//琛屽悓姝ヤ俊鍙疯鏁板櫒路
	[email protected](posedge clk)  begin
		if(clr)
		 hc <= 0;
		else
		begin
			if(hc == hpixels - 1) begin
			hc <= 0;
			vsensable <= 1;
			//enable teh vertical counter to increase
			end
			else
			begin
			hc <= hc + 1;
			vsensable <= 0; //leave the vsenable off
			end		
		end
	end
	
	
	//浜х敓hsync鑴夊啿
	//褰揾c涓~127鐨勬椂鍊欙紝琛屽悓姝ヤ俊鍙蜂负浣庣數骞
	[email protected](*) begin
		if(hc < 96)
			hsync <= 0;
		else 
			hsync <= 1;
	end
	
	//鍦哄悓姝ヤ俊鍙疯鏁板櫒
	[email protected](posedge clk) begin
		if(clr)
			vc <= 0;
		else begin
			if(vsensable == 1) begin
				if(vc == vlines - 1)
					vc <= 0;
				else 
					vc <= vc + 1;
			end
		end
	end
	
	//浜х敓vsync鑴夊啿
	//褰揾c涓鎴栬€鐨勬椂鍊欙紝鍦哄悓姝ヨ剦鍐蹭负浣庣數骞
	[email protected](*) begin
		if( vc < 2) 
			vsync <= 0;
		else
			vsync <= 1;
	end
	
	[email protected](*) begin
		if((hc < hfp)&&(hc > hbp)&&(vc < vfp)&&(vc > vbp))
			vidon <= 1;
		else 
			vidon <= 0;
	end
	
endmodule
           
module vga_initial(
		vidon,
		hc,
		vc,
		M,
		sw,
		rom_addr4,
		red,
		blue,
		green
    );

	input wire  vidon;
	input wire  [9:0]hc;
	input wire  [9:0]vc;
	input wire  [0:31]M;
	input wire  [7:0]sw;
	output wire [3:0]rom_addr4;
	output reg  [2:0]red;
	output reg  [2:0]green;
	output reg  [1:0]blue;

	parameter hbp = 10'b00100_10000;  //行显示后沊	parameter vbp = 10'b00000_11111;  //场显示后沊	parameter W = 32;
	parameter H = 16;
	
	wire [10:0]C1,R1,rom_addr,rom_pix;
	reg spriteon,R,G,B;
	assign C1 = {2'b00,sw[3:0],5'b00001};
	assign R1 = {2'b00,sw[7:4],5'b00001};
	assign rom_addr = vc - vbp - R1;
	assign rom_pix = hc - hbp - C1;
	assign rom_addr4 = rom_addr[3:0];
	//enable sprite video out when within the sprite region
	[email protected](*) begin
		if((hc >= C1 + hbp )&&(hc < C1 + hbp + W)&& (vc >= R1 + vbp)&&(vc <R1 + vbp + H))
			spriteon <= 1;
		else
			spriteon <= 0;
	end
	
	[email protected](*)  begin
		if((spriteon == 1)&&(vidon == 1))  begin
			R <= M[rom_pix];
			G <= M[rom_pix];
			B <= M[rom_pix];
			red <= {R,R,R};
			green <= {G,G,G};
			blue <= {B,B};
		end
		else begin
			red <= 0;
			green <= 0;
			blue <= 0;
		end
	end
	
endmodule
           
module prom_DMH(
	addr,
	M
    );

	input wire [3:0] addr;
	output wire [0:31]M;
	
	wire [31:0]show = 32'h1234; 
	
	reg [0:31]rom[0:15];
	
	parameter data0 = {
		8'b01111110,  //0
		8'b10000001,  //1
		8'b10111001,  //2
		8'b10111001,  //3
		8'b10111001,  //4
		8'b10111001,  //5
		8'b10111001,  //6
		8'b10111001,  //7
		8'b10111001,  //8
		8'b10111001,  //9
		8'b10111001,  //10
		8'b10111001,  //11
		8'b10111001,  //12
		8'b10111001,  //13
		8'b10000001,  //14
		8'b01111110   //15
	};
	
	parameter data1 = {
		8'b00111000,  //0
		8'b11111000,  //1
		8'b00111000,  //2
		8'b00111000,  //3
		8'b00111000,  //4
		8'b00111000,  //5
		8'b00111000,  //6
		8'b00111000,  //7
		8'b00111000,  //8
		8'b00111000,  //9
		8'b00111000,  //10
		8'b00111000,  //11
		8'b00111000,  //12
		8'b00111000,  //13
		8'b00111000,  //14
		8'b01111100   //15
	};
	
	parameter data2 = {
		8'b00111110,  //0
		8'b11000001,  //1
		8'b10000010,  //2
		8'b00000010,  //3
		8'b00000100,  //4
		8'b00000100,  //5
		8'b00000100,  //6
		8'b00001000,  //7
		8'b00110000,  //8
		8'b00110000,  //9
		8'b00100000,  //10
		8'b00100000,  //11
		8'b00100000,  //12
		8'b01000000,  //13
		8'b11000000,  //14
		8'b11111111   //15
	};
	
	parameter data3 = {
		8'b01111110,  //0
		8'b10000001,  //1
		8'b00000010,  //2
		8'b00000100,  //3
		8'b00001000,  //4
		8'b00010000,  //5
		8'b00100000,  //6
		8'b11000000,  //7
		8'b11000000,  //8
		8'b00100000,  //9
		8'b00010000,  //10
		8'b00001000,  //11
		8'b00000100,  //12
		8'b00000010,  //13
		8'b10000001,  //14
		8'b01111110   //15
	};
	
	parameter data4 = {
		8'b00000010,  //0
		8'b00000100,  //1
		8'b00001000,  //2
		8'b00010000,  //3
		8'b00110000,  //4
		8'b01010000,  //5
		8'b10010000,  //6
		8'b11111111,  //7
		8'b00010000,  //8
		8'b00010000,  //9
		8'b00010000,  //10
		8'b00010000,  //11
		8'b00010000,  //12
		8'b00010000,  //13
		8'b00010000,  //14
		8'b00010000   //15
	};
	
	parameter data5 = {
		8'b11111111,  //0
		8'b10000000,  //1
		8'b10000000,  //2
		8'b10000000,  //3
		8'b10000000,  //4
		8'b11110000,  //5
		8'b00001000,  //6
		8'b00000100,  //7
		8'b00000010,  //8
		8'b00000001,  //9
		8'b00000010,  //10
		8'b00000100,  //11
		8'b00001000,  //12
		8'b00010000,  //13
		8'b00100000,  //14
		8'b01000000   //15
	};
	
	parameter data6 = {
		8'b01111111,  //0
		8'b01000000,  //1
		8'b01000000,  //2
		8'b01000000,  //3
		8'b01000000,  //4
		8'b01000000,  //5
		8'b01000000,  //6
		8'b01111111,  //7
		8'b01000001,  //8
		8'b01000001,  //9
		8'b01000001,  //10
		8'b01000001,  //11
		8'b01000001,  //12
		8'b01000001,  //13
		8'b01000001,  //14
		8'b01111111   //15
	};
	
	parameter data7 = {
		8'b01111111,  //0
		8'b00000001,  //1
		8'b00000001,  //2
		8'b00000010,  //3
		8'b00000010,  //4
		8'b00000010,  //5
		8'b00000100,  //6
		8'b00000100,  //7
		8'b00001000,  //8
		8'b00001000,  //9
		8'b00010000,  //10
		8'b00010000,  //11
		8'b00100000,  //12
		8'b00100000,  //13
		8'b01000000,  //14
		8'b01000000   //15
	};
	
	parameter data8 = {
		8'b01111110,  //0
		8'b01000010,  //1
		8'b01000010,  //2
		8'b01000010,  //3
		8'b01000010,  //4
		8'b01000010,  //5
		8'b01000010,  //6
		8'b01000010,  //7
		8'b01111110,  //8
		8'b01000010,  //9
		8'b01000010,  //10
		8'b01000010,  //11
		8'b01000010,  //12
		8'b01000010,  //13
		8'b01000010,  //14
		8'b01111110   //15
	};
	
	parameter data9 = {
		8'b01111111,  //0
		8'b01000001,  //1
		8'b01000001,  //2
		8'b01000001,  //3
		8'b01000001,  //4
		8'b01000001,  //5
		8'b01000001,  //6
		8'b01111111,  //7
		8'b00000001,  //8
		8'b00000001,  //9
		8'b00000001,  //10
		8'b00000001,  //11
		8'b00000001,  //12
		8'b00000001,  //13
		8'b00000010,  //14
		8'b01111100   //15
	};
	
	parameter dataa = {
		8'b011111111,  //0
		8'b000000001,  //1
		8'b000000001,  //2
		8'b000000001,  //3
		8'b000000001,  //4
		8'b000000001,  //5
		8'b000000001,  //6
		8'b000000001,  //7
		8'b011111111,  //8
		8'b010000001,  //9
		8'b010000001,  //10
		8'b010000001,  //11
		8'b010000001,  //12
		8'b010000001,  //13
		8'b010000001,  //14
		8'b011111110   //15
	};
	
	parameter datab = {
		8'b01000000,  //0
		8'b01000000,  //1
		8'b01000000,  //2
		8'b01000000,  //3
		8'b01000000,  //4
		8'b01000000,  //5
		8'b01100000,  //6
		8'b01010000,  //7
		8'b01001000,  //8
		8'b01000100,  //9
		8'b01000010,  //10
		8'b01000001,  //11
		8'b01000001,  //12
		8'b01000010,  //13
		8'b01000100,  //14
		8'b01110000   //15
	};
	
	parameter datac = {
		8'b00000001,  //0
		8'b00000010,  //1
		8'b00000100,  //2
		8'b00001000,  //3
		8'b00010000,  //4
		8'b00100000,  //5
		8'b01000000,  //6
		8'b01000000,  //7
		8'b01000000,  //8
		8'b00100000,  //9
		8'b00010000,  //10
		8'b00001000,  //11
		8'b00001000,  //12
		8'b00000100,  //13
		8'b00000010,  //14
		8'b00000001   //15
	};
	
	parameter datad = {
		8'b00000001,  //0
		8'b00000001,  //1
		8'b00000001,  //2
		8'b00000001,  //3
		8'b00000001,  //4
		8'b00000001,  //5
		8'b00000001,  //6
		8'b00000001,  //7
		8'b01111111,  //8
		8'b01000001,  //9
		8'b01000001,  //10
		8'b01000001,  //11
		8'b01000001,  //12
		8'b01000001,  //13
		8'b01000001,  //14
		8'b01111111   //15
	};
	
	parameter datae = {
		8'b,  //0
		8'b,  //1
		8'b,  //2
		8'b,  //3
		8'b,  //4
		8'b,  //5
		8'b,  //6
		8'b,  //7
		8'b,  //8
		8'b,  //9
		8'b,  //10
		8'b,  //11
		8'b,  //12
		8'b,  //13
		8'b,  //14
		8'b   //15
	};
	
	parameter dataf = {
		8'b00001111,  //0
		8'b00010000,  //1
		8'b00010000,  //2
		8'b00010000,  //3
		8'b00010000,  //4
		8'b00010000,  //5
		8'b00010000,  //6
		8'b00010000,  //7
		8'b11111111,  //8
		8'b11111111,  //9
		8'b00010000,  //10
		8'b00010000,  //11
		8'b00010000,  //12
		8'b00010000,  //13
		8'b00010000,  //14
		8'b00111000   //15
	};
	
	parameter data = {
		32'b01000000000011000001101000000010,  //0
		32'b11000001000011000001101000000010,  //1
		32'b01000000100010100010101000000010,  //2
		32'b01000000010010100010101000000010,  //3
		32'b01000000001010100010101000000010,  //4
		32'b01000000001010010010101000000010,  //5
		32'b01000000001010010010101000000010,  //6
		32'b01000000001010010010101111111110,  //7
		32'b01000000001010001000101000000010,  //8
		32'b01000000001010001000101000000010,  //9
		32'b01000000001010001000101000000010,  //10
		32'b01000000001010001000101000000010,  //11
		32'b01000000010010000000101000000010,  //12
		32'b01000000100010000000101000000010,  //13
		32'b01000001000010000000101000000010,  //14
		32'b01000000000100000000101000000010   //15
		};
		
	integer i;
	/*initial begin
		for(i = 0;i < 16;i= i+1)
			rom[i] = data[(511-32*i)-:32];
	end*/
	//[0:31]rom[0:15];
	
	[email protected](*) begin
		for(i = 0;i < 16;i= i+1)
			rom[i] = data[(511-32*i)-:32];
	end
	
	assign M = rom[addr];
	
endmodule
           

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