For decades, silicon-based power transistors (MOSFETs, field-effect transistors) have formed the backbone of power conversion systems that convert alternating current (AC) to direct current (DC) or vice versa, or convert direct current from low to high voltage. In the search for alternatives that could increase switching speed, gallium nitride (GaN) quickly became one of the leading candidate materials. GaN/AlGaN material systems exhibit higher electron mobility and higher breakdown critical electric fields. Combined with a high electron mobility transistor (HEMT) architecture, it enables devices and ICs with higher breakdown strength, faster switching speeds, lower conductivity losses, and a smaller footprint than comparable silicon solutions.
Cross-sectional diagram of IMEC 200V GaN-on-SOI power IC technology and components. The process features monolithic integration of E/D mode HEMT, Schottky diodes, resistors, capacitors, and includes advanced process modules (deep trench isolation, substrate contact, redistribution layers...). ）
Today, most GaN power systems consist of multiple chips. GaN-based devices are assembled as discrete components before being assembled onto a printed circuit board. The disadvantage of this approach is that there are parasitic inductors that affect the performance of the device. "Taking the driver as an example, a discrete transistor with a driver on a separate chip is affected by parasitic inductance between the driver output stage and the transistor input and between the half-bridge switch nodes. GaN HEMT has a very high switching speed, which leads to ringing, i.e. undesirable oscillations of the signal, when the parasitic inductance is not suppressed. The best way to reduce parasitics and take advantage of GaN's superior switching speed is to integrate the driver and HEMT on the same chip," explains Stefaan Decoutere from IMEC.
"At the same time, it reduces dead-time control between two transistors in a half-bridge, where one transistor must be closed when the other is turned on." During this time, there is a short circuit between the power supply and ground, or a dead time. Integrating all components on the chip will solve ringing problems, reduce dead time, and ultimately improve the converter's power efficiency. ”
Co-integration of d-mode HEMT
Imec has made great strides in integrating monolithic building blocks on silicon-on-insulator (SOI) substrates such as drivers, half-bridges, and control/protection circuits. Now, researchers have successfully added two wildly popular components to the portfolio: d-mode (depletion mode) HEMT and Schottky diodes.
Process cross-section of a high-voltage component manufactured on a 200 mm GaN-on-SOI substrate (a) e-mode pGaN-HEMT (b) d-mode MIS-HEMT, (c) Schottky barrier diode. All devices include metal field plates based on front-end and interconnect metal layers separated by dielectric layers
One of the major obstacles to improving the full performance of GaN power ICs remains finding a suitable solution to the lack of p-channel devices with acceptable performance in GaNs. CMOS technology uses complementary and more symmetrical pairs of p- and n-type FETs, based on the hole and electron mobility of both FETs. In GaN, however, the mobility of holes is about 60 times worse than that of electrons; in silicon, it's only 2 times. This means that p-channel devices with holes as the primary carrier will be 60 times larger and less efficient than their n-channel counterparts. A widely used alternative is to replace P-MOS with resistors. Resistor transistor logic (RTL) has been used in GaN ICs, but there is a trade-off between switching time and power dissipation.
"We improved the performance of our GaN ICs by co-integrating d-mode HEMTS on the functional e-mode HEMT platform on the SOI. Boost and depletion modes are on(d mode) or OFF(e mode) states at zero source voltages, causing current to flow (or not flow) in the transistor. We expect that taking a step from RTL to directly coupled FET logic will increase speed and reduce the power consumption of the circuit," says Stefaan Decoutere.
Schottky diode with low leakage current
The integration of Schottky barrier diodes further improves the power efficiency of GaN power ICs. They can withstand higher voltages at the same on-resistance or lower on-resistance at the same breakdown voltage than silicon diodes. "The challenge in making Schottky barrier diodes was to obtain low on-voltage and low leakage levels. Unfortunately, when you target a lower on-voltage, you end up with a small barrier to stop the leakage current. Schottky diodes are notorious for their high leakage current. Imec's proprietary gate edge termination Schottky barrier diode architecture (GET-SBD) achieves a low turn-on voltage of approximately 0.8 volts while reducing leakage current by several orders of magnitude compared to traditional GaN Schottky barrier diodes.
The characteristic display of the manufactured GET-SBD (left) shows a low turn-on voltage of 0.91V on a half-logarithmic scale at 25°C, and (right) a field plate configuration evaluated at 25 and 150°C for low reverse leakage current (2 nA/mm at 25°C) of two different anodes.
Fast switching and high voltage
GaN is the material of choice for high power applications because the critical voltage (breakdown voltage) that causes transistor breakdown is 10 times higher than silicon. But for low-power applications, GaN still has the advantage of being superior to silicon because of its excellent switching speed. "The GaN-based ICs we created opened the way for smaller, more efficient DC/DC converters and point-of-load (PoL) converters. For example, a smartphone, tablet, or laptop contains chips that can operate at different voltages, so they require an AC/DC converter to charge the battery and a PoL converter inside the device to generate different voltages. These components include not only switches, but also transformers, capacitors and inductors. The faster the transistor switches, the smaller these components are,
Stefaan Decoutere: "Fast chargers constitute the largest market for GaN today, followed by power supplies for servers, the automotive industry and renewable energy. Power supplies using GaN are expected to be more reliable at the system level. They are smaller in size and weight, which reduces the bill of materials and thus lowers costs.
Vertical devices being studied
"We will focus on improving the performance of our existing platforms and conducting further reliability testing." We currently offer 200V and 650V platforms for prototyping, with 100V coming soon. For GaN-ICs with integrated components, 1200V high-power platforms may not produce significant improvements. The higher the voltage, the slower the component becomes. Therefore, it may not be necessary to integrate drivers on the chip; the simulation will tell us. ”
"At the same time, we are looking for alternatives to discrete 1200V devices that enable GaN technology to be used in the highest voltage power applications such as electric vehicles. Transistors with lateral topologies are the dominant GaN device architectures today. The three terminals of these devices (source, gate, and drain) are located on the surface of the same plane, so the electric field is transverse, spanning the GaN buffer layer and part of the back end (metallization, oxide). In vertical devices, the source and gate are located on the surface, while the drain is at the bottom of the epitaxial stack. In this case, an electric field flows through the entire stack. The device breakdown voltage is determined by source-drain separation, which protects the channel from breakdown. However, the greater the distance between the source and drain electrodes placed laterally, the larger the device. Because the chip of a 1200V device can become too large, the landscape architecture typically recommends a maximum of 650V. Conversely, for vertical devices, using higher voltages comes down to creating a thicker epitaxial stack because the source and drain are at different ends of the stack. The surface area of the chip did not increase," concludes Stefaan Decoutere.