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dm9000a驱动源码分析

dm9000a框架原理图:

dm9000a驱动源码分析
EEPROM Interface接口用于存放mac地址,InternalSRAM用于存放收发数据,MII部分把MAC部分与PHY部分连接起来通信,AUTO-MDIX用于自适应10/100M网络,在物理层上,MAC在PHY之下。 

由dm9000a驱动可知,dm9000a驱动是用platform模型编写的,分析一个驱动源码都是从模块加载函数module_init()开始,而dm9000a加载函数是module_init(dm9000_init).

继而调用:

  1. static int __init

  2. dm9000_init(void)

  3. {

  4. printk(KERN_INFO "%s Ethernet Driver, V%s\n", CARDNAME, DRV_VERSION);

  5. return platform_driver_register(&dm9000_driver);

  6. }

dm9000_driver结构体:
  1. static struct platform_driver dm9000_driver = {

  2. .driver = {

  3. .name = "dm9000",//名字

  4. .owner = THIS_MODULE,

  5. },

  6. .probe = dm9000_probe,//模块加载后,调用probe函数

  7. .remove = __devexit_p(dm9000_drv_remove),

  8. .suspend = dm9000_drv_suspend,

  9. .resume = dm9000_drv_resume,

  10. };

模块加载之后,调用probe函数,如下:
  1. static int __devinit

  2. dm9000_probe(struct platform_device *pdev)

  3. {

  4. struct dm9000_plat_data *pdata = pdev->dev.platform_data;

  5. struct board_info *db;

  6. struct net_device *ndev;

  7. const unsigned char *mac_src;

  8. int ret = 0;

  9. int iosize;

  10. int i;

  11. u32 id_val;

  12. unsigned char ne_def_eth_mac_addr[]={0x00,0x12,0x34,0x56,0x80,0x49};

  13. static void *bwscon;

  14. static void *gpfcon;

  15. static void *extint0;

  16. static void *intmsk;

  17. #define BWSCON (0x48000000)

  18. #define GPFCON (0x56000050)

  19. #define EXTINT0 (0x56000088)

  20. #define INTMSK (0x4A000008)

  21. bwscon=ioremap_nocache(BWSCON,0x0000004);

  22. gpfcon=ioremap_nocache(GPFCON,0x0000004);

  23. extint0=ioremap_nocache(EXTINT0,0x0000004);

  24. intmsk=ioremap_nocache(INTMSK,0x0000004);

  25. writel(readl(bwscon)|0xc0000,bwscon);

  26. writel( (readl(gpfcon) & ~(0x3 << 14)) | (0x2 << 14), gpfcon);

  27. writel( readl(gpfcon) | (0x1 << 7), gpfcon); // Disable pull-up

  28. writel( (readl(extint0) & ~(0xf << 28)) | (0x4 << 28), extint0); //rising edge

  29. writel( (readl(intmsk)) & ~0x80, intmsk);

  30. ndev = alloc_etherdev(sizeof(struct board_info));

  31. if (!ndev) {

  32. dev_err(&pdev->dev, "could not allocate device.\n");

  33. return -ENOMEM;

  34. }

  35. SET_NETDEV_DEV(ndev, &pdev->dev);

  36. dev_dbg(&pdev->dev, "dm9000_probe()\n");

  37. db = ndev->priv;

  38. memset(db, 0, sizeof(*db));

  39. db->dev = &pdev->dev;

  40. db->ndev = ndev;

  41. spin_lock_init(&db->lock);

  42. mutex_init(&db->addr_lock);

  43. INIT_DELAYED_WORK(&db->phy_poll, dm9000_poll_work);

  44. db->addr_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);

  45. db->data_res = platform_get_resource(pdev, IORESOURCE_MEM, 1);

  46. db->irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);

  47. if (db->addr_res == NULL || db->data_res == NULL ||

  48. db->irq_res == NULL) {

  49. dev_err(db->dev, "insufficient resources\n");

  50. ret = -ENOENT;

  51. goto out;

  52. }

  53. iosize = res_size(db->addr_res);

  54. db->addr_req = request_mem_region(db->addr_res->start, iosize,

  55. pdev->name);

  56. if (db->addr_req == NULL) {

  57. dev_err(db->dev, "cannot claim address reg area\n");

  58. ret = -EIO;

  59. goto out;

  60. }

  61. db->io_addr = ioremap(db->addr_res->start, iosize);

  62. if (db->io_addr == NULL) {

  63. dev_err(db->dev, "failed to ioremap address reg\n");

  64. ret = -EINVAL;

  65. goto out;

  66. }

  67. iosize = res_size(db->data_res);

  68. db->data_req = request_mem_region(db->data_res->start, iosize,

  69. pdev->name);

  70. if (db->data_req == NULL) {

  71. dev_err(db->dev, "cannot claim data reg area\n");

  72. ret = -EIO;

  73. goto out;

  74. }

  75. db->io_data = ioremap(db->data_res->start, iosize);

  76. if (db->io_data == NULL) {

  77. dev_err(db->dev, "failed to ioremap data reg\n");

  78. ret = -EINVAL;

  79. goto out;

  80. }

  81. ndev->base_addr = (unsigned long)db->io_addr;

  82. ndev->irq = db->irq_res->start;

  83. dm9000_set_io(db, iosize);

  84. if (pdata != NULL) {

  85. if (pdata->flags & DM9000_PLATF_8BITONLY)

  86. dm9000_set_io(db, 1);

  87. if (pdata->flags & DM9000_PLATF_16BITONLY)

  88. dm9000_set_io(db, 2);

  89. if (pdata->flags & DM9000_PLATF_32BITONLY)

  90. dm9000_set_io(db, 4);

  91. if (pdata->inblk != NULL)

  92. db->inblk = pdata->inblk;

  93. if (pdata->outblk != NULL)

  94. db->outblk = pdata->outblk;

  95. if (pdata->dumpblk != NULL)

  96. db->dumpblk = pdata->dumpblk;

  97. db->flags = pdata->flags;

  98. }

  99. #ifdef CONFIG_DM9000_FORCE_SIMPLE_PHY_POLL

  100. db->flags |= DM9000_PLATF_SIMPLE_PHY;

  101. #endif

  102. dm9000_reset(db);

  103. for (i = 0; i < 8; i++) {

  104. id_val = ior(db, DM9000_VIDL);

  105. id_val |= (u32)ior(db, DM9000_VIDH) << 8;

  106. id_val |= (u32)ior(db, DM9000_PIDL) << 16;

  107. id_val |= (u32)ior(db, DM9000_PIDH) << 24;

  108. if (id_val == DM9000_ID)

  109. break;

  110. dev_err(db->dev, "read wrong id 0x%08x\n", id_val);

  111. }

  112. if (id_val != DM9000_ID) {

  113. dev_err(db->dev, "wrong id: 0x%08x\n", id_val);

  114. ret = -ENODEV;

  115. goto out;

  116. }

  117. id_val = ior(db, DM9000_CHIPR);

  118. dev_dbg(db->dev, "dm9000 revision 0x%02x\n", id_val);

  119. switch (id_val) {

  120. case CHIPR_DM9000A:

  121. db->type = TYPE_DM9000A;

  122. break;

  123. case CHIPR_DM9000B:

  124. db->type = TYPE_DM9000B;

  125. break;

  126. default:

  127. dev_dbg(db->dev, "ID %02x => defaulting to DM9000E\n", id_val);

  128. db->type = TYPE_DM9000E;

  129. }

  130. ether_setup(ndev);

  131. ndev->open = &dm9000_open;

  132. ndev->hard_start_xmit = &dm9000_start_xmit;

  133. ndev->tx_timeout = &dm9000_timeout;

  134. ndev->watchdog_timeo = msecs_to_jiffies(watchdog);

  135. ndev->stop = &dm9000_stop;

  136. ndev->set_multicast_list = &dm9000_hash_table;

  137. ndev->ethtool_ops = &dm9000_ethtool_ops;

  138. ndev->do_ioctl = &dm9000_ioctl;

  139. #ifdef CONFIG_NET_POLL_CONTROLLER

  140. ndev->poll_controller = &dm9000_poll_controller;

  141. #endif

  142. db->msg_enable = NETIF_MSG_LINK;

  143. db->mii.phy_id_mask = 0x1f;

  144. db->mii.reg_num_mask = 0x1f;

  145. db->mii.force_media = 0;

  146. db->mii.full_duplex = 0;

  147. db->mii.dev = ndev;

  148. db->mii.mdio_read = dm9000_phy_read;

  149. db->mii.mdio_write = dm9000_phy_write;

  150. mac_src = "eeprom";

  151. for (i = 0; i < 6; i += 2)

  152. dm9000_read_eeprom(db, i / 2, ndev->dev_addr+i);

  153. if (!is_valid_ether_addr(ndev->dev_addr) && pdata != NULL) {

  154. mac_src = "platform data";

  155. memcpy(ndev->dev_addr, pdata->dev_addr, 6);

  156. }

  157. if (!is_valid_ether_addr(ndev->dev_addr)) {

  158. mac_src = "chip";

  159. for (i = 0; i < 6; i++)

  160. //ndev->dev_addr[i] = ior(db, i+DM9000_PAR); // by bai

  161. ndev->dev_addr[i] = ne_def_eth_mac_addr[i];

  162. }

  163. if (!is_valid_ether_addr(ndev->dev_addr))

  164. dev_warn(db->dev, "%s: Invalid ethernet MAC address. Please "

  165. "set using ifconfig\n", ndev->name);

  166. platform_set_drvdata(pdev, ndev);

  167. ret = register_netdev(ndev);

  168. if (ret == 0) {

  169. DECLARE_MAC_BUF(mac);

  170. printk(KERN_INFO "%s: dm9000%c at %p,%p IRQ %d MAC: %s (%s)\n",

  171. ndev->name, dm9000_type_to_char(db->type),

  172. db->io_addr, db->io_data, ndev->irq,

  173. print_mac(mac, ndev->dev_addr), mac_src);

  174. }

  175. return 0;

  176. out:

  177. dev_err(db->dev, "not found (%d).\n", ret);

  178. dm9000_release_board(pdev, db);

  179. free_netdev(ndev);

  180. return ret;

  181. }