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LPDDR memory is key to the AI performance of a device

author:The semiconductor industry is vertical
LPDDR memory is key to the AI performance of a device

THIS ARTICLE IS SYNTHESIZED BY THE SEMICONDUCTOR INDUSTRY (ID: ICVIEWS).

LPDDR is an evolution of DDR memory technology as an energy-efficient alternative.

LPDDR memory is key to the AI performance of a device

Low Power Double Data Rate (LPDDR) is a high-performance, low-power memory designed specifically for mobile phones. Since its initial release in 2006, each generation of LPDDR has delivered the bandwidth and capacity needed for a major shift in the mobile user experience. With the next wave of generative AI applications built into our phones and laptops, LPDDR is once again at the forefront of another critical shift.

The key to AI on the terminal is efficient reasoning. The process of using trained AI models to make predictions or decisions requires specialized memory technologies that are higher performance and can be tailored to the unique needs of the end device. AI inference memory on endpoints needs to strike the right balance between bandwidth, capacity, power, and form factor.

LPDDR is an evolution of DDR memory technology as an energy-efficient alternative. The advantage of LPDDR is that it consumes very little power when the end device is not using memory. Due to the lower operating frequency, this low-power standard can easily and quickly adjust performance compared to DDR. LPDDR can enter a low-power state when the end device is not in use, significantly reducing power consumption. LPDDR5X is the fastest and most efficient version of the LPDDR standard to date.

A wide range of applications and end devices require fast memory access to make real-time decisions:

  • Smartphones and other mobile applications require high bandwidth and optimized power consumption, as well as the ability to adjust frequencies based on device activity.
  • Automotive processors to support applications such as advanced driver assistance systems (ADAS). Most automotive applications use automotive-grade SDRAM, with more stringent standards than traditional consumer products.
  • AI accelerators, i.e., high-performance parallel computers, efficiently handle AI workloads such as neural networks.
  • Artificial intelligence at the edge requires fast data processing with zero latency locally.
  • Chips used in digital home products such as cameras and video devices, TVs and routers, and media devices must be able to perform fast ultra-high-density (UHD) multimedia processing.
  • 5G network equipment, which requires real-time data transmission to support fast data download and upload.

LPDDR5 and optional extension LPDDR5X are the latest updates to the standard.

The LPDDR5X standard was published by JEDEC in June 2021 and is a dedicated synchronous dynamic random access memory (SDRAM). Compared to the previous LPDDR5 standard, LPDDR5X has achieved improvements in several areas:

  • While keeping the 1.1V core voltage constant, the speed was increased from 6.4Gbps to 8.5Gbps.
  • Signal integrity is improved through the use of receiver equalization and transmitter [SH1] pre-emphasis techniques.
  • The new adaptive refresh management feature improves reliability.
  • Up to 20% increase in battery efficiency.

LPDDR5X Focus on improving performance, power, and flexibility; It offers data rates of up to 8.533 Gbps, significantly improving speed and performance. Compared to DDR5 memory, LPDDR5/5X limits the data bus width to 32 bits while increasing the data rate. Switching to a quarter-speed clock compared to the half-speed clock in LPDDR4, coupled with a new feature, dynamic voltage frequency scaling, keeps higher data rate LPDDR5 operation within the same thermal budget as LPDDR4-based devices.

Considering space considerations for mobile devices, as well as the greater memory requirements for advanced applications, LPDDR5X can support capacities up to 64GB by using multiple DRAM chips in a multi-chip package. Take the 7B LLaMa 2 model as an example: if it is based on INT4, the model will consume 3.5GB of memory capacity. The x64's LPDDR5X encapsulation, each with two LPDDR5X devices, provides a total bandwidth of 68 GB/s, so the LLaMa 2 model can run inference at 19 tokens per second.

As the demand for higher memory performance continues to grow, we see LPDDR5 evolving in the market, with major vendors announcing additional expansions for LPDDR5 called LPDDR5T, where T stands for turbo. LPDDR5T Boosts performance to 9.6 Gbps for a total bandwidth of 76.8 GB/s in an x64 package across multiple LPDDR5T stacks. As a result, the above 7B LLaMa 2 model example can run inference at a rate of 21 tokens per second.

With its low power consumption and high bandwidth capabilities, LPDDR5 is suitable not only for cutting-edge mobile devices, but also for AI inference in endpoints, where energy efficiency and compact form factor are critical considerations. Rambus offers a new LPDDR5T/5X/5 controller IP that is fully optimized for applications that require high memory throughput and low latency. Rambus LPDDR5T/5X/5 controllers support cutting-edge LPDDR5T memory devices and support all third-party LPDDR5 PHYs. It maximizes bus bandwidth and minimizes latency through look-ahead command processing, memory management, and automatic pre-charging. The controller can be delivered with additional cores such as in-line ECC or memory analyzer cores to improve field reliability, availability, and serviceability (RAS).

With the growing popularity of bandwidth-intensive applications such as mobile communications, artificial intelligence, and high-level autonomous vehicles, the demand for high-speed memory access will continue to grow. The low-cost LPDDR5X SDRAM offers excellent speed, and given the evolution of the LPDDR memory interface standard to date, its future development is limitless.

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